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Short description
Block diagram
Features
Tools
Short description

The CDC 3257G-Cx is a pin-compatible Flash ROM derivate of Micronas’ 32-bit Car Dashboard Controller family based on an ARM7TDMITM CPU core (CDC 32xxG).

This device comes along with additional features of the Cx platform like a superior power saving module (PSM), two high-speed CAN modules (Bosch V2.0B) and a device lock module to inhibit Flash access. Main characteristics of the PSM are three additional low-power modes (IDLE, WAKE, and STANDBY), an internal RC oscillator, a polling/Flash timer output, as well as an RTC (Real Time Clock).

The CDC 3257G also contains the patented built-in ERM (EMI Reduction Module).

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Block diagram

System Architecture

The Car Dashboard Controller CDC 3257G contains an embedded ARM7TDMI processor which operates at a maximum clock frequency of 50 MHz.

The internal high-speed bus connects the following peripherals to the ARM7TDMI processor:

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ICU (Interrupt Control Unit)
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SRAM
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DMA

The 16/32-bit bus connects to Flash and boot ROM. All other peripherals are connected to the I/O bus. All I/O ports have multiple functions to obtain utmost flexibility. A total of 102 GPIOs can be selected.

The built-in ERM delivers superb EMI results reducing the peak values by up to 10 dBµV.

The CDC 3257G is fully pin- and software-compatible with all other members of the CDC 32xxG family.

Block diagram of the CDC 3257G
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Features

Main Features

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256 KB Flash
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12 KB SRAM
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8 KB boot ROM
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Four CPU operation modes (Deep Slow, Slow, Fast, PLL)Three low-power modes (Idle, Wake, Standby)
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RTC delivering hours, minutes, seconds
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Polling/Flash timer output
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PLL circuitry delivering up to 50 MHz
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4- to 5-MHz oscillator
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EMI reduction module (ERM)
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Digital watchdog
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Central clock divider
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Interrupt controller with 40 inputs and 16 priority levels
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Six port interrupts
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Regulator input supervision for reset/alarm (alarm comparator)Clock and supply supervision16-channel 10-bit ADC
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Two comparators
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ADC reference (1 internal , 3 external)
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48×4 LCD module
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Three DMA channels
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Two UARTs, two SPIs
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DigitBus master module
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Two CAN modules with 512 Bytes each of object RAM according to Bosch specification V2.0B (32 message objects)
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Two I2C master modules
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Seven stepper motor drivers
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Six PWM modules (configurable as 2×8 bit or 1×16 bit)
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Pulse frequency modulator
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Sound generator with auto decay
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Two SW-selectable clock outputs
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16 bit free-running counter with six capture/compare modules
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Patch module (up to 10 cells)
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Device lock module (DLM) inhibiting Flash access
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1×16-bit timer and 4×8-bit timer
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JTAG interface
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-40 to +105 °C case temperature range
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Single 3.5 V to 5.5 V supply voltage (limited I/O performance below 4.5 V)
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Up to 102 GPIOs
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128-pin PQFP package, 0.5 mm pin pitch
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Tools

Development Tools

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Evaluation chip CDC 3205G featuring
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ETM via embedded emulation JTAG
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ROM/ Flash emulation with external SRAM (up to 8 MBytes)
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Evaluation Board (EVB) including the CDC 3205G for evaluation and debugging of embedded systems
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Application Board (APB) for Flash memory programming
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Probe for PQFP128
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Software environment (compiler, linker, assembler) from 3rd party vendors
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RTOS from 3rd party vendors
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CAN protocol stacks
Development tool setup
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