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Short description
Block diagram
Features
Patent Information
Short description

The VCT 6wxyP family is dedicated to high-quality FPD and double-scan TV sets. The IC enables an economic single-package FPD TV solution without any external devices. Even memory and program ROM are integrated in the IC. The pin-compatible VCT 6wxyP family represents a unique concept offering a scaleable feature set. This allows the design of a complete range of TV sets based on a common and economic hardware and software platform.

Modular design and deep submicron technology allow the integration of audio, video, teletext, OSD, and controller-related functionalities. They cover the whole range of flat-panel display TVs and all classes of double-scan CRT TV sets. The IC is based on proven functional blocks of existing products like VCT 49xxI, VSP 94x5B, and DPS 94xxB.

Each member of the IC family contains the entire audio, video, upconversion processing for 4:3 and 16:9 50/60 Hz progressive or 100/120 Hz interlaced stereo TV sets plus the control/data interface for flat-panel displays. The integrated microcontroller is supported by a powerful OSD and graphics generator with integrated teletext acquisition.

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Block diagram

System Architecture

The VCT 6wxyP family provides a front-end video processing unit with 4 CVBS-Y/C or component inputs for HDTV, EDTV, and SDTV. A VBI slicer, support of 1000 pages of teletext, and a 3-D comb filter for PAL and NTSC (in certain versions) are also available. The front-end unit further allows to process an SD and an HD source in parallel, thus enabling PiP and PaP functionality. Motion-adaptive de-interlacing, temporal noise reduction, and film mode detection are based on a unified memory technology.

Post-scaling in the display processing block ensures the desired output format. Display processing is supported by an 8-bit 8051-compatible controller. By means of powerful alpha-blending, the graphics mixer composes the output image from following image layers: the video layer, the OSD layer and the pixel graphics layer.

The audio part consists of a multistandard sound IF demodulator and a baseband processor supporting all desired sound features in this range.

A connection for additional features, such as advanced motion compensation via -Micronas’ FRC 94xyA, is also provided.

Block diagram of the VCT 6wxyP

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Features

Video

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CVBS, S-VHS, YCrCb and RGB inputs
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HDTV YPrPb and RGB inputs
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Line-based de-interlacing/upconversion with vertical detail enhancement
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State-of-the-art motion-adaptive de-interlacing/up-conversion (optionally)
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4H adaptive comb filter for PAL/NTSC
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3-D comb filter for PAL/NTSC (optionally)
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Powerful horizontal and vertical scaling inclusive nonlinear horizontal scaling “Panoramavision”
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Picture-adaptive image improvements (DCE, LSE, CTI, SCE, NCE)

Audio

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Sound IF input
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Multistandard TV-sound demodulation:
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All A2/NICAM standards
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BTSC/SAP with DBX
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EIA-J
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FM Stereo Radio and RDS/RBDS
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Baseband sound processing for loudspeaker channel:
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Volume, bass, treble, loudness, balance
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Spatial effect (e.g. pseudo stereo)
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Micronas AROUND (Virtual Dolby Surround optional)
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Micronas BASS
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BBE
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SRS WOW, SRS TruSurround XT
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Lip Sync function (audio delay line)
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Independent headphone channel
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I2S input interface
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S/PDIF output

Controller

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High-performance 8-bit microcontroller, 8051 compatible
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512 kByte in system program Flash
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WST, PDC, VPS, and WSS acquisition
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Closed caption and V-chip acquisition
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Up to 10 pages on-chip teletext memory
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Up to 1000 pages of teletext (optionally)
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Up to 30 GPIOs

Panel Control

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LVDS output (dual channel)
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Digital RGB out 3×10 bit single channel or 2×3×8 bit dual channel
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Output resolution: WXGA (1366×768) or SXGA (1280×1024)
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6 free-programmable panel control signals
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Backlight modulation

Package

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PLQFP208-1 package
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All VCT 6wxyP family members are pin-compatible
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Patent Information

Digital BTSC decoding protected by Micronas Patents Nr. US 6,492,913 and US 6,281,813

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